The present application relates generally to an improved data processing apparatus and method and more specifically to an apparatus and method for using power proxies combined with on-chip actuators to meet a defined power target.
As multi-core processors become more commonplace, power management issues become more important. Multi-core processors refer to a central processing unit that includes multiple complete execution cores per physical processor. The central processing unit combines multiple processors and their caches and cache controllers onto a single integrated circuit (silicon chip). Multi-core processors are well suited for multi-tasking environments because there are multiple complete execution cores instead of one, each with an independent interface to the front side bus. Since each core has its own cache, the operating system has sufficient resources to handle most compute intensive tasks in parallel.
Effective power management in a microprocessor requires measurement or approximation of power. However, the measurement of real calibrated power consumption in hardware is a difficult and complex task. That is, measuring real calibrated power consumption may be complicated due to the difficulties in isolating the voltage and current delivery to the appropriate unit/associated activity and adding the instrumentation in the power distribution network (on-chip) to measure them. Furthermore, real power measurements would be analog, thus, converting and integrating the analog signals into digital signals appropriate for digital control systems on-chip is non-trivial both technically and economically.